HM62V16256C Datasheet, PDF (9/18 Pages) Hitachi Semiconductor – 4 M SRAM (256-kword x 16-bit)

Read Cycle
Parameter
Read cycle time
Address access time
Chip select access time
Output enable to output valid
Output hold from address change
LB, UB access time
Chip select to output in low-Z
LB, UB enable to low-z
Output enable to output in low-Z
Chip deselect to output in high-Z
LB, UB disable to high-Z
Output disable to output in high-Z
HM62V16256C Series
Symbol
t _RC
t _AA
t _ACS1
t _ACS2
t _OE
t _OH
t _BA
t _CLZ1
t _CLZ2
t _BLZ
t _OLZ
t _CHZ1
t _CHZ2
t _BHZ
t _OHZ
HM62V16256C
-5
-7
Min Max Min
55
—
70
—
55
—
—
55
—
—
55
—
—
35
—
10
—
10
—
55
—
10
—
10
10
—
10
5
—
5
5
—
5
0
20
0
0
20
0
0
20
0
0
20
0
Max Unit Notes
—
ns
70
ns
70
ns
70
ns
40
ns
—
ns
70
ns
—
ns
2, 3
—
ns
2, 3
—
ns
2, 3
—
ns
2, 3
25
ns
1, 2, 3
25
ns
1, 2, 3
25
ns
1, 2, 3
25
ns
1, 2, 3
9