HD74LV161A Datasheet, PDF (8/19 Pages) Hitachi Semiconductor – Synchronous 4-bit Binary Counter (Direct Clear)

HD74LV161A
Switching Characteristics
• V_CC = 2.5 ± 0.2 V
Ta = 25°C
Ta = –40 to 85°C
Item
Maximum
clock
frequency
Propa-
gation
delay time
Setup time
Symbol
fmax
t_PLH/t_PHL
t_PLH/t_PHL
Count
mode
t_PLH/t_PHL
Load
mode
t_PLH/t_PHL
t_PHL
t_PHL
t_su
Min
50
30
—
—
—
—
—
—
—
—
—
—
—
—
7.5
10.0
9.5
Typ Max Min
90 — 40
60 — 25
11.1 16.2 1.0
14.3 19.2 1.0
11.5 17.0 1.0
14.7 20.0 1.0
13.8 20.6 1.0
17.0 23.6 1.0
10.3 15.7 1.0
14.0 18.7 1.0
11.7 17.0 1.0
14.7 20.0 1.0
11.2 16.6 1.0
14.4 19.6 1.0
— — 8.5
— — 11.5
— — 11.0
Max
—
—
19.5
22.5
20.5
23.5
24.5
27.5
19.0
22.0
20.5
23.5
20.0
23.0
—
—
—
Unit
MHz
ns
ns
4.5 — — 4.5
—
Hold time t_h
Pulse
t_w
width
1.5 — — 1.5
—
ns
7.0 — — 7.0
—
ns
7.0 — — 7.0
—
Test Conditions
C_L = 15 pF
C_L = 50 pF
C_L = 15 pF
C_L = 50 pF
C_L = 15 pF
C_L = 50 pF
C_L = 15 pF
C_L = 50 pF
C_L = 15 pF
C_L = 50 pF
C_L = 15 pF
C_L = 50 pF
C_L = 15 pF
C_L = 50 pF
FROM
(Input)
TO
(Output)
CLK
Q
CLK
Carry
CLK
Carry
ENT
Carry
CLR
Q
CLR
Carry
Data before CLK ↑
LOAD before CLK ↑
ENT, ENP before CLK
↑
CLR inactive before
CLK ↑
CLK H or L
CLR L
8