HD74LV10A Datasheet, PDF (8/12 Pages) Hitachi Semiconductor – Triple 3-input Positive NAND Gates

HD74LV10A
Test Circuit
Measurement point
C_L*
Note: CL includes the probe and jig capacitance.
• Waveform – 1
t_r
t_f
90%
90%
V_CC
Input
50% V_CC
50% V_CC
10%
10%
0V
t_PLH
t_PHL
In phase output
t_PHL
50% V_CC
50% V_CC
t_PLH
V_OH
V_OL
Out of phase output
V_OH
50% V_CC
50% V_CC
V_OL
Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, t_r ≤ 3 ns, t_f ≤ 3 ns
2. The output are measured one at a time with one transition per measurement.
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