HD151TS301RP Datasheet, PDF (6/8 Pages) Hitachi Semiconductor – Clock Generator for Printer

HD151TS301RP
AC Electrical Characteristics / Clock Output & SSC Clock Output
Ta = 25°C, VDD = 3.3 V, C_L = 30 pF
Item
Symbol Min
Typ
Max
Unit Test Conditions Notes
Cycle to cycle jitter ^{*1, 2} t
—
—
| 500 | ps @24 MHz
SSCCLKOUT
CCS
SSC = –0.5%
—
—
| 500 |
@48 MHz
SEL1:0 = 1 1
Figure 1
—
—
| 500 |
@24 MHz
SSCCLKOUT
SSC = –3.0%
—
—
| 500 |
@48 MHz
SEL1:0 = 0 1
Figure 1
—
—
| 500 |
@24, 48 MHz
CLKOUT
Figure 1
Output frequency ^{*1, 2}
23.6
—
24.3
MHz @24 MHz
SSCCLKOUT
SSC = –0.5%
46.6
—
49.2
@48 MHz
SEL1:0 = 1 1
23.0
—
24.3
@24 MHz
SSCCLKOUT
SSC = –3.0%
45.5
—
49.2
@48 MHz
SEL1:0 = 0 1
23.7
—
24.3
@24 MHz
CLKOUT
46.8
—
49.2
@48 MHz
Slew rate ^*1
t_SL
Clock duty cycle ^*1
1.0
—
—
V/ns @48 MHz
0.4 V to 2.4 V
45
50
55
%
Output impedance ^*1
—
30
—
Ω
Spread spectrum
modulation frequency ^*1
—
33
—
KHz @48 MHz
Input clock frequency
20
—
50
MHz
Stabilization time ^*1,3
t_STAB
—
—
2
ms
Notes: 1. Parameters are guaranteed by design and characterization. Not 100% tested in production.
2. Cycle to cycle jitter and output frequency are included spread spectrum modulation.
3. Stabilization time is the time required for the integrated circuit to obtain phase lock of its input
signal after power up.
SSCCLKOUT
tcycle n
tcycle n+1
t _CCS = (tcycle n) - (tcycle n+1)
Figure 1 Cycle to cycle jitter (SSCCLKOUT)
Rev.4, Sep. 2001, page 6 of 8