HA13566AF Datasheet, PDF (6/20 Pages) Hitachi Semiconductor – Combo (Spindle & VCM) Driver

HA13566AF
The data bit DD9 determine the transfer gain G_VCM which is specified as the relationship between the input
data at the input data register and the output current at VCM amplifier. (See the under table)
DD9
1
1
DATA
1FF
100
I_O [mA]
+199.2/R_S
0.000
1
000
–200.0/R_S
0
1FF
+24.9/R_S
0
100
0.000
0
000
–25.0/R_S
Data Input Timing
SERENAB
Vth (= 1/2V_CC2 Typ)
t1
t0
CLK
Vth
DATA
Vth
t3 t2
t4 t5
Up date point
Latch point
A0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
t0 ≥ 20ns
t1 ≥ 20ns
t2 ≥ 50ns
t3 ≥ 40ns
t4 ≥ 40ns
t5 ≥ 40ns
Figure 4 Input Timing on Serial Port
SERENAB
t6
t6
Internal
DAC output
t6 : Conversion time of DAC ≤ 1µs
Figure 5 Conversion Timing on DAC
6