HD74ACT161 Datasheet, PDF (5/14 Pages) Hitachi Semiconductor – Synchronous Presettable Binary Counter

Block Diagram
HD74ACT161/HD74ACT163
PE
CEP
CET
’161 ’163
’163
ONRY
P0
P1
P2
P3
TC
CP
CP
’161
CP
ONRY
D CP D
CD _{O O}
Q0
Q0
DETAIL A
DETAIL A
DETAIL A
DETAIL A
MR ’161
SR ’163
Q0
Q1
Q2
Q3
Please note that this diagram is provided only for the understanding of logic operations and should not be
used to estimate propagation delays.
DC Characteristics (unless otherwise specified)
Item
Symbol Max
Unit
Maximum quiescent supply current I_CC
80
µA
Maximum quiescent supply current I_CC
8.0
µA
Maximum additional I_CC/input
(HD74ACT161/HD74ACT163)
I _CCT
1.5
mA
Condition
V_IN = V_CC or ground, V_CC = 5.5 V,
Ta = Worst case
V_IN = V_CC or ground, V_CC = 5.5 V,
Ta = 25°C
V_IN = V_CC – 2.1 V, V_CC = 5.5 V,
Ta = Worst case
5