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HM5165165F Datasheet, PDF (4/37 Pages) Hitachi Semiconductor – 64M EDO DRAM (4-Mword x 16-bit) 8k refresh/4k refresh
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HM5164165F Series, HM5165165F Series
Pin Arrangement (HM5165165F Series)
VCC
I/O0
I/O1
I/O2
I/O3
VCC
I/O4
I/O5
I/O6
I/O7
NC
VCC
WE
RAS
NC
NC
NC
NC
A0
A1
A2
A3
A4
A5
VCC
50-pin SOJ
1
50
2
49
3
48
4
47
5
46
6
45
7
44
8
43
9
42
10
41
11
40
12
39
13
38
14
37
15
36
16
35
17
34
18
33
19
32
20
31
21
30
22
29
23
28
24
27
25
26
(Top view)
VSS
I/O15
I/O14
I/O13
I/O12
VSS
I/O11
I/O10
I/O9
I/O8
NC
VSS
LCAS
UCAS
OE
NC
NC
NC
A11
A10
A9
A8
A7
A6
VSS
Pin Description
Pin name
A0 to A11
I/O0 to I/O15
RAS
UCAS, LCAS
WE
OE
VCC
VSS
NC
Function
Address input
— Row/Refresh address A0 to A11
— Column address
A0 to A9
Data input/output
Row address strobe
Column address strobe
Write enable
Output enable
Power supply
Ground
No connection
VCC
I/O0
I/O1
I/O2
I/O3
VCC
I/O4
I/O5
I/O6
I/O7
NC
VCC
WE
RAS
NC
NC
NC
NC
A0
A1
A2
A3
A4
A5
VCC
50-pin TSOP
1
50
2
49
3
48
4
47
5
46
6
45
7
44
8
43
9
42
10
41
11
40
12
39
13
38
14
37
15
36
16
35
17
34
18
33
19
32
20
31
21
30
22
29
23
28
24
27
25
26
(Top view)
VSS
I/O15
I/O14
I/O13
I/O12
VSS
I/O11
I/O10
I/O9
I/O8
NC
VSS
LCAS
UCAS
OE
NC
NC
NC
A11
A10
A9
A8
A7
A6
VSS
4
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