HD66137 Datasheet, PDF (4/19 Pages) Hitachi Semiconductor – High-Voltage Durable 240-Channel Common Driver for Dot-Matrix STN LCD

HD66137T
Internal Block Diagram
1. LCD drive Circuit
This circuit selects and outputs the three level signals for the LCD drive. By a combination of the data in
the shift register and M, either VH, VL, or VM is selected and transmitted to the output circuit.
2. Level shifter
This boosts a 5-V signal to a high-voltage signal for LCD drive.
3. Shift register
This is a 240-bit bidirectional shift register circuit. The first line marker signal output from the DIO1 pin
and DIO2 pin is sequentially shifted by shift clock CL. The shift direction is determined by the SHL pin.
4. Alternating signal generating circuit
This circuit generates an alternating signal (M signal) for LCD display. To suppress cross-talk, the signal is
alternated in a unit from several lines to several tens of lines. By connecting MWS0 to MWS4 pins to V_CC
or GND, the desired number of signals can be alternated. When alternating signals are externally input, all
pins (MWS0 to MWS4) are connected to GND.
HIFAS Family timing Comparison
HD66130/131S/134S/135/136
Input
CL1
signal
M
HD66132/133
Output
signal
Segment
Common
4