2SK1566 Datasheet, PDF (4/6 Pages) Hitachi Semiconductor – Silicon N-Channel MOS FET

2SK1566, 2SK1567
Power vs. Temperature Derating
60
40
20
0
50
100
150
Case Temperature T_C (°C)
Maximum Safe Operation Area
50
20
10
5
2
1
0.5
0.2
Operation
is Limited
in
by
DC
PW
Opera=tio1n0
this Area
R_{DS (on)}
1
100
ms
10
µ_s
µ_s
ms
(T
C
=(12S5h°Cot))
0.1
0.05
1
Ta = 25°C ^2SK1567
2SK1566
3 10 30 100 300 1,000
Drain to Source Voltage V_DS (V)
3
D=1
1.0
0.5
Normalized Transient Thermal Impedance vs. Pulse Width
T_C = 25°C
0.3 _0.2
0.1
0.1 _0.05
0.02
0.03
0.01
0.01
1
Shot
Pulse
10 µ
100 µ
θch–c (t) = γ _S (t) · θch–c
θch–c = 3.57°C/W, T_C = 25°C
P_DM
PW
T
D
=
PW
T
1m
10 m
100 m
1
10
Pulse Width PW (s)
4