2SK1528 Datasheet, PDF (4/6 Pages) Hitachi Semiconductor – Silicon N-Channel MOS FET

2SK1528(L), 2SK1528(S)
Power vs. Temperature Derating
60
40
20
0
50
100
150
Case Temperature T_C (°C)
Maximum Safe Operation Area
50
20
10
5
2
1
0.5
0.2
0.1
Ta = 25°C
DC
PW
=
Operation
10
(T
1
ms
m1s001^µ0sµs
(1 _Shot)
C _{= 25°C)}
0.05
1 3 10 30 100 300 1,000
Drain to Source Voltage V_DS (V)
Normalized Transient Thermal Impedance vs. Pulse Width
3
D=1
1.0
0.5
T_C = 25°C
0.3
0.2
0.1
0.1
0.05
0.02
0.03
0.01
1 ^Shot
Pulse
0.01
10 µ
100 µ
θch–c (t) = γ_S (t) · θch–c
θch–c = 2.08°C/W, T_C = 25°C
P_DM
PW
T
D
=
PW
T
1m
10 m
100 m
1
10
Pulse Width PW (s)
4