HA12167FB Datasheet, PDF (31/73 Pages) Hitachi Semiconductor – Audio Signal Processor for Cassette Deck (Deck 1 Chip)

HA12167FB/HA12169FB
60
E_DAC = 0 step
R_ADJ = 33 kΩ(Normal)
V_CC = 14 V
55
R_ADJ = 24 kΩ(Chrome)
R_ADJ = 20 kΩ(Metal)
R_FM = 100 kΩ
50
R_FQ = 51 kΩ
R_F/Q = 51 kΩ
R_GH = 33 kΩ
R_GL = 33 kΩ
45
R’_GP = 510 kΩ
40
35
0
10
20
30
40
50
60
70
B_DAC step
Figure 14 Equalizer Peak Gain vs. DAC Step Characteristics (2)
When the (variable) width of the DAC step is to be changed, the gain at step 0 or at step 63 must be
changed. The step 0 gain can be changed using R’_GP as shown in figure 13. Also, R’_GP can be switched
using the tape selector, as shown in figure 15. However, it is necessary to take into account that the value
of R_ADJ, which sets the step 63 gain, is also used for the output bias. When the load resistance on pin 33 is
R_L, the following formula gives the output bias, V_BMAX.
V
BMAX
=
2.4
×
R
L
/
R
ADJ
Therefore, it is possible to compensate the output bias, V_BMAX for the R_ADJ setting by changing R_L.
Note: R_ADJ should be in the range 16 kΩ to 75 kΩ.
Rev.3, Jun. 1997, page 31 of 73