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HD74AC194 Datasheet, PDF (3/11 Pages) Hitachi Semiconductor – 4-bit Bidirectional Unviersal Shift Register
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Logic Diagram
HD74AC194
DSL
P3
P2
P1
P0
DSR
S0
S1
CP
MR
D
C
CQ
CL CL
D
C
CQ
CL CL
D
C
CQ
CL CL
D
C
CQ
CL CL
Q3
Q2
Q1
Q0
Mode Select Table
Inputs
Output
Operating Mode
Reset
MR
S1
S0
DSR
DSL
Pn
Q0
Q1
Q2
Q3
L
X
X
X
X
X
L
L
L
L
Hold
H
L
L
X
X
X
q0
q1
q2
q3
Shift Left
H
H
L
X
L
X
q1
q2
q3
L
H
H
L
X
H
X
q1
q2
q3
H
Shift Right
H
L
H
L
X
X
L
q0
q1
q2
H
L
H
H
X
X
H
q0
q1
q2
Parallel Load
H
H
H
X
X
pn
p0
p1
p2
p3
H : HIGH Voltage Level
L : LOW Voltage Level
pn (qn) : Lower case letters indicate the state of the referenced input (or output) one setup time prior to the
LOW-to-HIGH clock transition
X : Immaterial
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