2SJ450 Datasheet, PDF (3/9 Pages) Hitachi Semiconductor – Silicon P-Channel MOS FET

2SJ450
Electrical Characteristics (Ta = 25°C)
Item
Symbol Min
Drain to source breakdown
voltage
V_(BR)DSS
–60
Gate to source breakdown
voltage
V_(BR)GSS
±20
Zero gate voltage drain current I_DSS
Gate to source leak current I_GSS
Gate to source cutoff voltage V_GS(off)
Static drain to source on state R_DS(on)
resistance
—
—
–0.5
—
Static drain to source on state R_DS(on)
—
resistance
Fowerd transfer admittance |y_fs|
0.6
Typ
—
—
—
—
—
0.85
1.1
1.0
Input capacitance
Ciss
—
Output capacitance
Coss —
Reverse transfer capacitance Crss
—
Turn-on delay time
t _d(on)
—
Rise time
t_r
—
Turn-off delay time
t _d(off)
—
Fall time
t_f
—
Body to drain diode forward V_DF
—
voltage
Body to drain diode reverse t_rr
—
recovery time
Note: 1. Pulse Test
Marking is "UY".
150
72
24
6
9
50
35
–0.9
100
Max
—
—
–50
±10
–1.5
1.2
1.9
—
—
—
—
—
—
—
—
—
—
Unit
V
V
µA
µA
V
Ω
Ω
S
pF
pF
pF
ns
ns
ns
ns
V
ns
Test conditions
I_D = –10 mA, V_GS = 0
I_G = ±100 µA, V_DS = 0
V_DS = –50 V, V_GS = 0
V_GS = ±16 V, V_DS = 0
V_DS = –10 V, I_D = –1 mA
I_D = –0.5 A
V_GS = –4 V*¹
I_D = –0.3 A
V_GS = –2.5 V*¹
I_D = –0.5 A
V_DS = –10 V
V_DS = –10 V
V_GS = 0
f = 1 MHz
V_GS = –10 V, I_D = –0.5 A
R_L = 60 Ω
I_F = –1 A, V_GS = 0
I_F = –1 A, V_GS = 0
diF/dt = 50A/µs
3