HD74HCT237 Datasheet, PDF (2/8 Pages) Hitachi Semiconductor – 3-to-8-line Decoder/Demultiplexer with Address Latch

HD74HCT237
Function Table
Inputs
Enable
Select
Outputs
GL G₁
G₂
C
B
A
Y₀
Y₁
Y₂
Y₃
Y₄
Y₅
Y₆
Y₇
XX
H
X
X
X
L
L
L
L
L
L
L
L
XL
X
X
X
X
L
L
L
L
L
L
L
L
LH
L
L
L
L
H
L
L
L
L
L
L
L
LH
L
L
L
H
L
H
L
L
L
L
L
L
LH
L
L
H
L
L
L
H
L
L
L
L
L
LH
L
L
H
H
L
L
L
H
L
L
L
L
LH
L
H
L
L
L
L
L
L
H
L
L
L
LH
L
H
L
H
L
L
L
L
L
H
L
L
LH
L
H
H
L
L
L
L
L
L
L
H
L
LH
L
H
H
H
L
L
L
L
L
L
L
H
HH
L
X
X
X
Output Corresponding to stored address L; all others H
Pin Arrangement
A1
B2
C3
GL 4
G2 5
G1 6
Y₇ 7
GND 8
A
B
Y0
C
Y1
GL
Y2
G2
Y3
G1
Y4
Y7 _Y6 Y₅
(Top view)
16 VCC
15 Y0
14 Y1
13 Y2
12 Y3
11 Y4
10 Y5
9 Y6
2