HD74HC323 Datasheet, PDF (2/10 Pages) Hitachi Semiconductor – 8-bit Universal Shift/Storage Register (with 3-state Outputs)

HD74HC323
Function Table
Inputs
Function Output
Select Control
Serial Inputs/Outputs
Outputs
Mode Clear S₁ S₀ G₁† G₂† Clock S_L S_R A/Q_A B/Q_B C/Q_C D/Q_D E/Q_E F/Q_F G/Q_G H/Q_H Q_A’ Q_H’
Clear L
XL L L
XXL L L L L L L L L L
L
L XL L
XXL L L L L L L L L L
Hold H
LLLL X
X X Q_A0 Q_B0 Q_C0 Q_D0 Q_E0 Q_F0 Q_G0 Q_H0 Q_A0 Q_H0
H
XXL L L
X X Q_A0 Q_B0 Q_C0 Q_D0 Q_E0 Q_F0 Q_G0 Q_H0 Q_A0 Q_H0
Shift H
L HL L
XHH
Q_An Q_Bn Q_Cn Q_Dn Q_En Q_Fn Q_Gn H
Q_Gn
Right H
L HL L
XL L
Q_An Q_Bn Q_Cn Q_Dn Q_En Q_Fn Q_Gn L
Q_Gn
Shift H
HL L L
H X Q_Bn Q_Cn Q_Dn Q_En Q_Fn Q_Gn Q_Hn H
Q_Bn H
Left H
HL L L
L X Q_Bn Q_Cn Q_Dn Q_En Q_Fn Q_Gn Q_Hn L
Q_Bn L
Load H
HHXX
XXa b c d e f
gh ah
a ... h = the level of the steady-state input at A through H, respectively. These data are loaded into the flip-
flops while the flip-flop outputs are isolated from the input/output terminals.
Pin Arrangement
S0 1
Output ^{G1 2}
controls _{G2 3}
G/QC 4
E/QE 5
C/QC 6
A/QA 7
QA' 8
Clear 9
GND 10
S0 _S1
G
SL
G/Q_C Q_H
E/QE H/QH
C/QC F/QF
A/QA D/QD
QA
B/QB
ClearSR CK
(Top view)
20 VCC
19 S1
18
Shift left
SL
17 QH'
16 H/QH
15 F/QF
14 D/QD
13 B/QB
12 Clock
11
Shift right
SR
2