HD74HC131 Datasheet, PDF (2/9 Pages) Hitachi Semiconductor – 3-to-8-line Decoder/Demultiplexer with Edge-Triggered Address Registers

HD74HC131
Function Table
Inputs
Enable
Select
Outputs
CLK G1 G₂
C
B
A
Y₀
Y₁
Y₂
Y₃
Y₄
Y₅
Y₆
Y₇
XX
H
X
X
X
H
H
H
H
H
H
H
H
XL
X
X
X
X
H
H
H
H
H
H
H
H
H
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
H
H
L
H
H
H
H
H
H
H
L
L
H
L
H
H
L
H
H
H
H
H
H
L
L
H
H
H
H
H
L
H
H
H
H
H
L
H
L
L
H
H
H
H
L
H
H
H
H
L
H
L
H
H
H
H
H
H
L
H
H
H
L
H
H
L
H
H
H
H
H
H
L
H
H
L
H
H
H
H
H
H
H
H
H
H
L
LH
L
X
X
X
Outputs corresponding to stored address, L; all others H
Pin Arrangement
A1
B2
C3
CLK 4
G2 5
G1 6
Y7 7
GND 8
(Top view)
16 VCC
15 Y0
14 Y1
13 Y2
12 Y3
11 Y4
10 Y5
9 Y6
2