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HD74AC157 Datasheet, PDF (2/9 Pages) Hitachi Semiconductor – Quad 2-Input Multiplexer
HD74AC157
Logic Symbol
E I0a I1a I0b I1b I0c I1c Iod I1d
S
Za
Zb
Zc
Zd
Pin Names
I0a to I0d
I1a to I1d
E
S
Za to Zd
Source 0 Data Inputs
Source 1 Data Inputs
Enable Input
Select Input
Outputs
Functional Description
The HD74AC157 is a quad 2-input multiplexer. It selects four bits of data from two sources under the
control of a common Select input (S). The Enable input (E) is active-Low. when E is High, all of the
outputs (Z) are forced Low regardless of all other inputs. The HD74AC157 is the logic implementation of
a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the
Select input. The logic equations for the outputs are shown below:
Za = E•(I1a•S + I0a•S)
Zb = E•(I1b•S + I0b•S)
Zc = E•(I1c•S + I0c•S)
Zd = E•(I1d•S + I0d•S)
A common use of the HD74AC157 is the moving of data from two groups of register to four common
output busses. The particular register from which the data comes is determined by the state of the Select
input. A less obvious use is as a function generator. The HD74AC157 can generate any four of the sixteen
different functions of two variables with one variable common. This is useful for implementing gating
functions.
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