2SK3349 Datasheet, PDF (2/8 Pages) Hitachi Semiconductor – Silicon N Channel MOS FET High Speed Switching

2SK3349
Absolute Maximum Ratings (Ta = 25°C)
Item
Symbol
Ratings
Drain to source voltage
V_DSS
20
Gate to source voltage
V_GSS
±10
Drain current
I_D
50
Drain peak current
I Note1
D(pulse)
200
Body-drain diode reverse drain current I_DR
50
Channel dissipation
Pch ^{Note 2}
100
Channel temperature
Tch
150
Storage temperature
Tstg
–55 to +150
Note: 1. PW ≤ 10 µs, duty cycle ≤ 1%
2. Value on the alumina ceramic board (12.5x20x0.7 mm)
Unit
V
V
mA
mA
mA
mW
°C
°C
Electrical Characteristics (Ta = 25°C)
Item
Symbol Min
Typ
Max
Unit Test Conditions
Drain to source breakdown V_(BR)DSS
20
—
—
V
voltage
I_D = 100 µA, V_GS = 0
Gate to source breakdown V_(BR)GSS
±10
—
—
V
voltage
I_G = ±100 µA, V_DS = 0
Gate to source leak current I_GSS
Zero gate voltege drain
I _DSS
current
—
—
±5
µA
V_GS = ±8 V, V_DS = 0
—
—
1
µA
V_DS = 20 V, V_GS = 0
Gate to source cutoff voltage V_GS(off)
Static drain to source on state R_DS(on)
resistance
R_DS(on)
Forward transfer admittance |y_fs|
Input capacitance
Ciss
Output capacitance
Coss
Reverse transfer capacitance Crss
0.8
—
1.8
V
I_D = 10 µA, V_DS = 5 V
—
2.8
3.6
Ω
I_D = 25 mA,V_GS = 4 V ^{Note 3}
—
4.8
7.2
Ω
I_D = 10 mA,V_GS = 2.5 V ^{Note 3}
56
85
—
mS
I_D = 25 mA, V_DS = 10 V ^{Note 3}
—
6
—
pF
V_DS = 10 V
—
7
—
pF
V_GS = 0
—
1.2
—
pF
f = 1 MHz
Turn-on delay time
t _d(on)
Rise time
t_r
Turn-off delay time
t _d(off)
Fall time
t_f
Note: 3. Pulse test
4. Marking is DN
—
120
—
ns
I_D = 25 mA, V_GS = 4 V
—
450
—
ns
R_L = 400 Ω
—
480
—
ns
—
500
—
ns
2