HA12226F Datasheet, PDF (16/86 Pages) Hitachi Semiconductor – Audio Signal Processor for Cassette Deck(Dolby B-type NR with Recording System)

HA12226F/HA12227F
BIAS (N) ^R21
Pin 33
BIAS (C) ^R20
Pin 32
Vbias
R22
Figure 10 External Components of Bias Block
Automatic Level Control
ALC is the input decay rate variable system. It has internal variable resistors of pin 55 (pin 44) by
RECOUT signal that is inputted to pin 9 (pin 34).
The operation is similitude to MS, detected by pin 13.
The signal input pin is pin 56 (pin 43). Resistor R1, R2 and capacitor C2, external components, for the
input circuit are commended as figure 12. There are requested to use value of the block diagram figure for
performance maintenance of S/N, T.H.D. etc.
Figure 11 shows the relation with R1 front RIN point and ROUT.
ALC operation level acts for the center of +4.5 dB at tape position TYPE I and the center of +2.5 dB at tape
position TYPE II, to standard level (300 mVrms).
Then, adopted maximum value circuit, ALC is operated by a large channel of a signal.
ALC ON/OFF can switch it by pin 15. Please do ALC ON, after it does for one time ALC OFF inevitably,
for ALC time to start usefully (when switching PB → PASS, when switching PB → PASS), in order to
reset ALC circuit.
300mV
TYPE I
TYPE II 4.5dB
2.5dB
RIN
Figure 11 ALC Operation Level
Rev.6, Dec. 2000, page 16 of 86