|
HM62W8512BI Datasheet, PDF (1/14 Pages) Hitachi Semiconductor – 4 M SRAM (512-kword x 8-bit) | |||
|
HM62W8512BI Series
4 M SRAM (512-kword à 8-bit)
ADE-203-1086A (Z)
Rev. 1.0
Jul. 13, 1999
Description
The Hitachi HM62W8512BI is a 4-Mbit static RAM organized 512-kword à 8-bit. HM62W8512BI Series
has realized higher density, higher performance and low power consumption by employing Hi-CMOS process
technology. The HM62W8512BI Series offers low power standby power dissipation; therefore, it is suitable
for battery backup systems. It is packaged in standard 32-pin TSOP II.
Features
⢠Single 3.3 V supply: 3.3 V ± 0.3V
⢠Access time: 70/85 ns (max)
⢠Power dissipation
 Active: 16.5 mW/MHz (typ)
 Standby: 3.3 µW (typ)
⢠Completely static memory. No clock or timing strobe required
⢠Equal access and cycle times
⢠Common data input and output: Three state output
⢠Directly LV-TTL compatible: All inputs and outputs
⢠Battery backup operation
⢠Operating temperature: â40 to +85ËC
Ordering Information
Type No.
HM62W8512BLTTI-7
HM62W8512BLTTI-8
Access time
70 ns
85 ns
Package
400-mil 32-pin plastic TSOP II (TTP-32D)
|
▷ |