HD74LV273A Datasheet, PDF (1/15 Pages) Hitachi Semiconductor – Octal D-type Flip-Flops with Clear

HD74LV273A
Octal D-type Flip-Flops with Clear
ADE-205-273 (Z)
1st Edition
April 1999
Description
The HD74LV273A has eight edge trigger D-type flip-flops with clear in a 20-pin package. Data on the D
input having the specified setup and hold times is transferred to the Q output on the low to high transition
of the clock input. The clear input when low, sets all outputs to a low state. Low-voltage and high-speed
operation is suitable for battery-powered products (e.g., notebook computers), and the low-power
consumption extends the battery life.
Features
• V_CC = 2.0 V to 5.5 V operation
• All inputs V_IH (Max.) = 5.5 V (@V_CC = 0 V to 5.5 V)
• All outputs V_O (Max.) = 5.5 V (@V_CC = 0 V)
• Typical V_OL ground bounce < 0.8 V (@V_CC = 3.3 V, Ta = 25°C)
• Typical V_OH undershoot > 2.3 V (@V_CC = 3.3 V, Ta = 25°C)
• Output current ±6 mA (@V_CC = 3.0 V to 3.6 V), ±16 mA (@V_CC = 4.5 V to 5.5 V)
Function Table
Inputs
CLR
CLK
D
Output Q
L
X
X
L
H
↑
H
H
H
↑
L
L
H
Note:
↓
X
Q₀
H: High level
L: Low level
X: Immaterial
↑: Low to high transition
↓: High to low transition
Q₀: Output level before the indicated steady state input conditions were established.