HD74HCT138 Datasheet, PDF (1/8 Pages) Hitachi Semiconductor – 3-to-8-line Decoder/Demultiplexer

HD74HCT138
3-to-8-line Decoder/Demultiplexer
Description
The HD74HCT138 has 3 binary select inputs (A, B, and C). If the device is enabled these inputs determine
which one of the eight normally high outputs will go low. Two active low and one active high enables (G₁,
G_2A and G_2B) are provided to ease the cascading of decoders.
Features
• LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
• High Speed Operation: t_pd (A, B, C to Y) = 18.5 ns typ (C_L = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: V_CC = 4.5 to 5.5 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: I_CC (static) = 4 µA max (Ta = 25°C)