HD74HC73 Datasheet, PDF (1/9 Pages) Hitachi Semiconductor – Dual J-K Flip-Flops (with Clear)

HD74HC73
Dual J-K Flip-Flops (with Clear)
Description
The flip-flop is edge sensitive to the clock input and change state on the negative going transition of the
clock pulse. Each flip-flop has independent, J, K, clock, and clear inputs and Q and Q outputs. Clear is
independent of the clock and accomplished by a low level on the input.
Features
• High Speed Operation: t_pd (Clock to Q) = 18 ns typ (C_L = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: V_CC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: I_CC (static) = 2 µA max (Ta = 25°C)
Function Table
Inputs
Outputs
Clear
Clock
J
K
Q
Q
L
X
X
X
L
H
H
L
L
No change
H
L
H
L
H
H
H
L
H
L
H
H
H
Toggle
H
L
X
X
No change
H
H
X
X
No change
H
X
X
No change