HD74HC670 Datasheet, PDF (1/10 Pages) Hitachi Semiconductor – 4-by-4 Register File (with 3-state outputs)

HD74HC670
4-by-4 Register File (with 3-state outputs)
Description
The HD74HC670, 16-bit register file is organized as 4 words of 4 bits each and separate on-chip decoding
is provided for addressing the four word locations to either write-in or retrieve data.
This permits simultaneous writing into one location and reading from another word location. Four data
inputs are available which are used to supply the 4-bit word to be stored. Location of the word is
determined by the write-address inputs A and B in conjunction with a write-enable signal. Data applied at
the inputs should be in its true form. That is, if a high-level signal is desired from the output, a high-level is
applied at the data input for that particular bit location. The latch inputs are arranged so that new data will
be accepted only if both internal address gate inputs are high. When this condition exists, data at the D
input is transferred to the latch output. When the write-enable input, (G_W) is high, the data inputs are
inhibited and their levels can cuase no change in the information stored in the internal latches. When the
read-enable input, (G_R) is high, the data outputs are inhibited and go into the high-impedance state. The
individual address lines permit direct acquisition of data stored in any four of the latches. Four individual
decoding gates are used to complete the address for reading a word. when the read address is made in
conjunction with the read-enable signal, the word appears at the four outputs.
Features
• High Speed Operation: t_pd (Read Select to Q) = 21 ns typ (C_L = 50 pF)
• High Output Current: Fanout of 15 LSTTL Loads
• Wide Operating Voltage: V_CC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: I_CC (static) = 4 µA max (Ta = 25°C)