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HD74HC4040 Datasheet, PDF (1/9 Pages) Hitachi Semiconductor – 12-stage Binary Counter | |||
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HD74HC4040
12-stage Binary Counter
Description
The HD74HC4040 is a 12-stage counter. This device is incremented on the falling edge (negative
transition) of the input clock, and all its output is reset to a low level by applying a logical high on its reset
input.
Features
⢠High Speed Operation: tpd (Clock to Q1) = 15 ns typ (CL = 50 pF)
⢠High Output Current: Fanout of 10 LSTTL Loads
⢠Wide Operating Voltage: VCC = 2 to 6 V
⢠Low Input Current: 1 µA max
⢠Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Function Table
C
X
X: Irrelevant
Reset
L
L
H
Outputs State
No change
Advance to next stage
All outputs are low
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