HD74HC4024 Datasheet, PDF (1/8 Pages) Hitachi Semiconductor – 7-stage Binary Counter

HD74HC4024
7-stage Binary Counter
Description
The HD74HC4024 is a 7-stage counter. This device is incremented on the falling edge (negative transition)
of the input clock, and all its output is reset to a low level by applying a logical high on its reset input.
Features
• High Speed Operation: t_pd (Clock to Q₁) = 14 ns typ (C_L = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: V_CC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: I_CC (static) = 4 µA max (Ta = 25°C)
Function Table
Clock
L
L
H
H
Reset
L
H
L
H
L
H
L
H
Outputs State
No change
All outputs are low
No change
All outputs are low
No change
All outputs are low
Advance to next state
All outputs are low