HD74HC4017 Datasheet, PDF (1/8 Pages) Hitachi Semiconductor – Decade Counter/Divider

HD74HC4017
Decade Counter/Divider
Description
The HD74HC4017 is a 5-stage divide-by-10 Johnson counter with ten decoded outputs and a carry-out bit.
High-speed operation and spike-free outputs are obtained by use of the Johnson decade counter
configuration.
The ten decoded outputs are normally low and go high only at their respective decimal time periods. A
high signal on Reset R asynchronously clears the decade counter and sets the carry output and Y₀ high.
With CE low, the count is advanced on a low-to-high transition at C input. Alternatively, if C is high, the
count is advanced on a high-to-low transition at CE. Each decoded output remains high for one full clock
cycle. The carry output is high while Q₀, Q₁, Q₂, Q₃ or Q₄ is high, then is low while Q₅, Q₆, Q₇, Q₈ or Q₉ is
high.
Features
• High Speed Operation
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: V_CC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: I_CC (static) = 4 µA max (Ta = 25°C)