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HD74HC377 Datasheet, PDF (1/9 Pages) Hitachi Semiconductor – Octal D-type Flip-Flops (with Enable) | |||
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HD74HC377
Octal D-type Flip-Flops (with Enable)
Description
Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the
positive-going edge of the clock pulse if the enable input G is low. Clock triggering occurs at a particular
voltage level and is not directly related to the transition time of the positive-going pulse. When the clock
input is at either the high or low level, the D input signal has no effect at the output. The circuits are
designed to prevent false clocking by transitions at the G input.
Features
⢠High Speed Operation: tpd = 13 ns typ (CL = 50 pF)
⢠High Output Current: Fanout of 10 LSTTL Loads
⢠Wide Operating Voltage: VCC = 2 to 6 V
⢠Low Input Current: 1 µA max
⢠Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Function Table
Inputs
Enable G
H
L
L
X
Clock
X
L
Data
X
H
L
X
Outputs
Q
Q
Q0
Q0
H
L
L
H
Q0
Q0
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