HD74HC292 Datasheet, PDF (1/12 Pages) Hitachi Semiconductor – Programmable Frequency Divider/Digital Timer

HD74HC292/HD74HC294
Programmable Frequency Divider/Digital Timer
Description
This device divides the incoming clock frequency by a number (a power of 2) that is preset by the
Programming inputs. It has two Clock inputs, either of which may be used as a clock inhibit. The device
also has an active-low Reset, which initializes the internal flip-flop states. Test Point outputs (TP1, TP2,
TP3) are provided with HD74HC292 to facilitate incoming inspections.
Test Point output is provided with HD74HC294 to facilitate incoming inspections.
Features
• High Speed Operation: t_pd (Clock to Q) = 16 ns typ (C_L = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: V_CC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: I_CC (static) = 4 µA max (Ta = 25°C)
Function Table
CLR
L
H
H
H
H
CLK1
X
L
H
X
CLK2
X
L
X
H
Q Output Mode
Cleared to L
Count
Count
Inhibit
Inhibit