HD74HC125 Datasheet, PDF (1/10 Pages) Hitachi Semiconductor – Quad. Bus Buffer Gates (with 3-state outputs)

HD74HC125/HD74HC126
Quad. Bus Buffer Gates (with 3-state outputs)
Description
The HD74HC125, HD74HC126 require the 3-state control input C to be taken high to put the output into
the high impedance condition, whereas the HD74HC125, HD74HC126 requires the control input to be low
to put the output into high impedance.
Features
• High Speed Operation: t_pd = 8 ns typ (C_L = 50 pF)
• High Output Current: Fanout of 15 LSTTL Loads
• Wide Operating Voltage: V_CC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: I_CC (static) = 4 µA max (Ta = 25°C)
Function Table
Inputs
C
HC125
HC126
A
H
L
X
L
H
L
L
H
H
X : Irrelevent
Z : Off (high-impedance) state of a 3-state output.
Output Y
HC125
Z
L
H
HC126
Z
L
H