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HD74HC107 Datasheet, PDF (1/9 Pages) Hitachi Semiconductor – Dual J-K Flip-Flops (with Clear)
HD74HC107
Dual J-K Flip-Flops (with Clear)
Description
This flip-flop is edge sensitive to the clock input and change state on the negative going transition of the
clock pulse. Each one has independent J, K, clock, and clear inputs and Q and Q outputs. Clear is
independent of the clock and accomplished by a low level on the input.
Features
• High Speed Operation: tpd (Clock to Q) = 19 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C)
Function Table
Inputs
Output
Clear
Clock
J
K
Q
Q
L
X
X
X
L
H
H
L
L
No change
H
L
H
L
H
H
H
L
H
L
H
H
H
Toggle
H
L
X
X
No change
H
H
X
X
No change
H
X
X
No change