HD74ALVCH162821 Datasheet, PDF (1/12 Pages) Hitachi Semiconductor – 3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs

HD74ALVCH162821
3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs
ADE-205-186A (Z)
2nd. Edition
September 1997
Description
The HD74ALVCH162821 can be used as two 10-bit flip flops or one 20-bit flip flop. The 20 flip flops are
edge triggered D-type flip flops. On the positive transition of the clock (CLK) input, the device provides
true data at the Q outputs. A buffered output enable (OE) input can be used to place the ten outputs in
either a normal logic state (high or low level) or a high impedance state. In the high impedance state, the
outputs neither load nor drive the bus lines significantly. The high impedance state and increased drive
provide the capability to drive bus line without need for interface or pullup components. The output enable
(OE) input does not affect the internal operations of the flip flops. Old data can be retained or new data can
be entered while the outputs are in the high impedance state. Active bus hold circuitry is provided to hold
unused or floating data inputs at a valid logic level. All outputs, which are designed to sink up to 12 mA,
include 26 Ω resistors to reduce overshoot and undershoot.
Features
• V_CC = 2.3 V to 3.6 V
• Typical V_OL ground bounce < 0.8 V (@V_CC = 3.3 V, Ta = 25°C)
• Typical V_OH undershoot > 2.0 V (@V_CC = 3.3 V, Ta = 25°C)
• High output current ±12 mA (@V_CC = 3.0 V)
• Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
• All outputs have equivalent 26 Ω series resistors, so no external resistors are required.