HD74ALVC1G125 Datasheet, PDF (1/13 Pages) Hitachi Semiconductor – Bus Buffer Gate with 3-state Output

HD74ALVC1G125
Bus Buffer Gate with 3-state Output
ADE-205-617A (Z)
Rev. 1
July 2001
Description
The HD74ALVC1G125 has a bus buffer gate with 3-state output in a 5 pin package. Output is disabled
when the associated output enable (OE) input is high. To ensure the high impedance state during power up
or power down, OE should be connected to V_CC through a pull-up resistor; the minimum value of the
resistor is determined by the current sinking capability of the driver. Low voltage and high speed operation
is suitable for the battery powered products (e.g., notebook computers), and the low power consumption
extends the battery life.
Features
• The basic gate function is lined up as hitachi uni logic series.
• Supplied on emboss taping for high speed automatic mounting.
• Supply voltage range : 1.2 to 3.6 V
Operating temperature range : −40 to +85°C
• All inputs V_IH (Max.) = 3.6 V (@V_CC = 0 V to 3.6 V)
All outputs V_O (Max.) = 3.6 V (@V_CC = 0 V)
• Output current ±2 mA (@V_CC = 1.2 V)
±4 mA (@V_CC = 1.4 V to 1.6 V)
±6 mA (@V_CC = 1.65 V to 1.95 V)
±18 mA (@V_CC = 2.3 V to 2.7 V)
±24 mA (@V_CC = 3.0 V to 3.6 V)
• Package type
Package type
VSON-5 pin
Package code
TNP-5D
Package suffix
VS
Taping code
E (3,000 pcs / Reel)