HD74AC123A Datasheet, PDF (1/9 Pages) Hitachi Semiconductor – Dual Retriggerable Resettable Multivibrator

HD74AC123A
Dual Retriggerable Resettable Multivibrator
Description
Each half of the HD74AC123A features retriggerable capability, complementary dc level triggering and
overriding Direct Clear. When a circuit is in the quasi-stable (delay) state, another trigger applied to the
inputs (per the Truth Table) will cause the delay period to start again, without disturbing the outputs. By
repeating this process, the output pulse period (Q High, Q Low) can be made as long as desired.
Alternatively, a delay period can be terminated at any time by a Low signal on C_D, which also inhibits
triggering. An internal connection from C_D to the input gate makes it possible to trigger the circuit by a
positive-going signal on C_D, as shown in the Truth Table. For timing capacitor values greater than 1000
pF, the output pulse width is defined as follows.
Where t_w is in ns, R_X is in k and C _X is in pF.
t_w = R_XC_X
Feature
• Outputs Source/Sink 24 mA