HSP3824 Datasheet, PDF (28/41 Pages) Harris Corporation – Direct Sequence Spread Spectrum Baseband Processor

Bit 7, 6
Bit 5
Bit 4, 3
Bit 2
Bit 1, 0
Bit 7
HSP3824
CONFIGURATION REGISTER 2 ADDRESS (08h) MODEM CONFIGURATION REGISTER C
These control bits are used to select the number of chips per symbol used in the I and Q paths of the receiver matched
filter correlators (see table below).
CHIPS PER SYMBOL
11
13
15
16
BIT 7
0
0
1
1
BIT 6
0
1
0
1
This control bit is used to disable the CRC16 check. When this bit is set, the processor will accept the received packet
and any packet error checks have to be detected externally. The HSP3824 will remain in the receive mode until either
the carrier is lost or the network processor resets the device to the acquisition mode, or if, in modes 2 or 3, the length
times out.
Logic 1 = Disable receiver error checks.
Logic 0 = Enable receiver checks.
These control bits are used to select the divide ratio for the demodulators receive chip clock timing.The value of N is
determined by the following equation:
Symbol Rate = MCLK/(N x Chips per symbol).
MASTER CLOCK/N
N=2
N=4
N=8
N = 16
BIT 4
0
0
1
1
BIT 3
0
1
0
1
This control bit sets the receiver into single or dual antenna mode. The Preamble acquisition processing length and
whether the modem scans antennas is controlled by this bit. If in single antenna mode, the ANT_SEL pin reflects CR0
bit 6 otherwise it reflects the receiver’s choice of antenna.
Logic 0 = Acquisition processing is for dual antenna acquisition.
Logic 1 = Acquisition processing is for single antenna acquisition.
These control bits are used to indicate one of the four Preamble Header modes for receiving data. Each of the modes
includes different combinations of Header fields. Users can choose the mode with the fields that are more appropriate
for their networking requirements. The Header fields that are combined to form the various modes are:
• SFD field
• CRC16 field
• Data length field (indicates the number of data bits that follow the Header information)
• Full protocol Header
INPUT MODE
0
1
2
3
BIT 1
0
0
1
1
BIT 0
0
1
0
1
RECEIVE PREAMBLE - HEADER FIELDS
Preamble, with SFD Field
Preamble, with SFD, CRC16
Preamble, with SFD Length, CRC16
Preamble, with Full Protocol Header
CONFIGURATION REGISTER 3 ADDRESS (0Ch) MODEM CONFIGURATION REGISTER D
Reserved (must set to “0”).
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