HIP8112A Datasheet, PDF (19/40 Pages) Harris Corporation – NTSC/PAL Video Decoder

HMP8112A
BIT
NUMBER
FUNCTION
7-0
HSYNC Pulse
END Time (LSB)
TABLE 20. HSYNC END TIME (LSB) REGISTER
SUB ADDRESS = 0x0E
DESCRIPTION
RESET
STATE
This register provides a programmable delay for the external HSYNC pulse. This is the 0010 0000_B
lower byte of the 10-bit word.
(0x20)
BIT
NUMBER
FUNCTION
15 - 10 Not Used
9-8
HSYNC Pulse
END Time (MSB)
TABLE 21. HSYNC END TIME (MSB) REGISTER
SUB ADDRESS = 0x0F
DESCRIPTION
RESET
STATE
Write Ignored, Read 0’s
This register provides a programmable delay for the external HSYNC pulse. This is the
upper byte of the 10-bit word.
0000 0000_B
(0x00)
BIT
NUMBER
FUNCTION
7-0
PLL Filter Adjust
Register
TABLE 22. PLL FILTER ADJUST REGISTER
SUB ADDRESS = 0x10
DESCRIPTION
RESET
STATE
The Phase Locked Loop (PLL) time constants can be changed for testing purposes. It is 0000 0000_B
recommended that the default value of 0x20 always be used. The reset state is 0x00.
(0x00)
TABLE 23. PLL SYNC DETECT WINDOW REGISTER
SUB ADDRESS = 0x11
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
PLL Horizontal Sync These bits control the PLL horizontal sync detect window. This window sets the length
Detect Window
of time that the line lock PLL will allow the detection of the HSYNC. HSYNC outside of
this window are declared missing and will cause the missing sync logic to start counting
missing syncs.
1101 1101_B
(0xDD)
TABLE 24. DC RESTORE START TIME (LSB) REGISTER
SUB ADDRESS = 0x12
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
DC RESTORE
This register provides a programmable delay for the internal DC RESTORE signal. This 0011 0111_B
START Time (LSB) is the lower byte of the 10-bit word.
(0x3F)
TABLE 25. DC RESTORE START TIME (MSB) REGISTER
SUB ADDRESS = 0x13
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
15 - 10
9-8
Not Used
Write Ignored, Read 0’s
DC RESTORE
This register provides a programmable delay for the internal DC RESTORE signal. This
START Time (MSB) is the upper byte of the 10-bit word.
0000 0000_B
(0x00)
4-19