HFDOM44S3RXXX Datasheet, PDF (9/30 Pages) Hanbit Electronics Co.,Ltd – 44Pin Flash Disk Module Min.16MB ~ Max.512MB, True IDE Interface

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HFDOM44S3Rxxx
REGISTERS
1) Data Register (Address – 1F0h[170h];Offset 0,8,9)
The Data Register is a 16-bit register, and it is used to transfer data blocks between the
CompactFlash Storage Card data buffer and the Host. This register overlaps the Error Register.The table below
describes the combinations of data register access and is provided to assist in understanding the overlapped Data
Register and Error/Feature Register rather than to attempt to define general PCMCIA word and byte access modes
and operations. See the PCMCIA PC Card Standard Release 2.0 for definitions of the Card Accessing Modes for
I/O and Memory cycles.
Note: Because of the overlapped registers, access to the 1F1h, 171h or offset 1 are not defined for word (-CE2 = 0
and -CE1 = 0) operations. These accesses are treated as accesses to the Word Data
Register. The duplicated registers at offsets 8, 9 and Dh have no restrictions on the operations that
can be performed by the socket.
DATA Register
Word Data Register
Even Data Register
Odd Data Register
Odd Data Register
Error/Feature Register
Error/Feature Register
Error/Feature Register
Data Register Access
CE2-
CE1-
A0
0
0
X
1
0
0
1
0
1
0
1
X
1
0
1
0
1
X
0
0
X
Offset
0,8,9
0,8
9
8,9
1,Dh
1
Dh
Data Bus
D15-D0
D7-D0
D7-D0
D15-D8
D7-D0
D15-D8
D15-D8
2) Error Register (Address – 1F1h[171h];Offset 1,0Dh Read Only)
This register contains additional information about the source of an error when an error is
indicated in bit 0 of the Status register. The bits are defined as follows:
D7
D6
D5
D4
D3
D2
D1
D0
BBK
UNC
0
IDNF
0
ABRT
0
AMNF
Error Register
This register is also accessed on data bits D15-D8 during a write operation to offset 0 with -CE2 low and -CE1 high.
Bit 7 (BBK): this bit is set when a Bad Block is detected.
Bit 6 (UNC): this bit is set when an Uncorrectable Error is encountered.
Bit 5: this bit is 0.
Bit 4 (IDNF): the requested sector ID is not valid error or cannot be found.
Bit 3: this bit is 0.
Bit 2 (Abort) This bit is set if the command has been aborted because of a CompactFlash
Storage Card status condition: (Not Ready, Write Fault, etc.) or when an invalid command
has been issued.
Bit 1 This bit is 0.
Bit 0 (AMNF) This bit is set in case of a general error happened.
3) Feature Register(Address – 1F1h[171h];Offset 1,0Dh Writer Only)
This register provides information regarding features of the CompactFlash Storage Card that the host can utilize.
This register is also accessed on data bits D15-D8 during a write operation to Offset 0 with -CE2 low and -CE1 high.
BIT DESCRIPTION-
7
6
5
4
3
2
1
0
Command specific
4) Sector Count Register(Address – 1F2h[172h];Offset 2)
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Rev. 1.0 (January, 2005)
9 / 30
HANBit Electronics Co., Ltd.