HSD16M32M4V Datasheet, PDF (7/10 Pages) Hanbit Electronics Co.,Ltd – Synchronous DRAM Module 64Mbyte ( 16M x 32-Bit ) 72-Pin SIMM based on 16Mx8, 4Banks, 4K Ref., 3.3V

HANBit
HSD16M32M4V
AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
PARAMETER
SYM
BOL
-A
MIN MAX
-8
MIN MAX
-H
MIN MA
X
-L
-10
MIN MAX MIN MAX
UNIT
NOT
E
CLK cycle CAS
7.5
8 10 1000
10
10
time
latency=3
100
tCC
1000
1000
1000 ns
1
CAS
0
-
- 12
10
13
latency=2
CLK to valid CAS
5.4
output delay latency=3
tSAC
CAS
-
latency=2
6
6
6
7
ns 1,2
7
-
6
7
Output data CAS
2.7
hold time
latency=3
tOH
CAS
-
latency=2
3
3
-
3
3
3
ns
2
3
3
CLK high pulse width
tCH 2.5
3
3
3
3.5
ns
3
CLK low pulse width
tCL 2.5
3
3
3
3.5
ns
3
Input setup time
tSS 1.5
2
2
2
2.5
ns
3
Input hold time
tSH 0.8
1
1
1
1.5
ns
3
CLK to output in Low-Z
tSLZ
1
1
1
1
1
ns
3
CLK to
CAS
5.4
output
latency=3
tSHZ
in Hi-Z
CAS
-
latency=2
6
6
6
7
-
6
Notes :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered
ie., [(tr + tf)/2-1]ns should be added to the parameter.
7
ns
2
7
ns
SIMPLIFIED TRUTH TABLE
COMMAND
CKE CKE
n-1 n
/C
S
/R /C
AA
SS
/W
E
D
Q
M
Register Mode register set H
X
L LLL X
Refresh
Auto refresh
Self Entry
refres
Exit
h
H
H
L L LH X
L
L H HH
L
H
X
H XXX
Bank active & row addr.
H
X
L L HH X
URL: www.hbe.co.kr
REV 1.0 (August.2002)
-7-
BA A10/
0,1
AP
A11
A9~A0
NOTE
OP code
1,2
3
X
3
3
X
3
V
Row address
HANBit Electronics Co.,Ltd.