HMS1M32M8A Datasheet, PDF (6/9 Pages) Hanbit Electronics Co.,Ltd – SRAM MODULE 4Mbyte(1M x 32-Bit) , 64-Pin SIMM Design

HANBit
HMS1M32M8A/Z8A
Notes (Read Cycle)
1. /WE is high for read cycle.
2. All read cycle timing is referenced from the last valid address to first transition address.
3. t_HZ and t_OHZ are defined as the time at which the outputs achieve the open circuit condition and are not referenced to V_OH
or V_OL levels.
4. At any given temperature and voltage condition, t_HZ (max.) is less than t_LZ (min.) both for a given device and from device
to device.
5. Transition is measured ± 200mV from steady state voltage with Load (B). This parameter is sampled and not 100%
tested.
6. Device is continuously selected with /CE = V_IL.
7. Address valid prior to coincident with /CE transition low.
TIMING WAVEFORM OF WRITE CYCLE (/OE = Clock )
Address
/OE
/CE
/WE
Data In
Data Out
t_AS(4)
t_WC
t_AW
t_CW(3)
t_WP(2)
High-Z
t_OHZ
t_WR(5)
t_DW
t_DH
Data Valid
t_OW
High-Z
TIMING WAVEFORM OF WRITE CYCLE (/OE Low Fixed)
t_WC
Address
/CE
/WE
t_AS(4)
t_AW
t_CW(3)
t_WP(2)
t_WR(5)
t_OH
Data In
Data Out
High-Z
t_WHZ(6,7)
t_DW
t_DH
Data Valid
t_OW
High-Z(8)
(10)
(9)
6
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