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HMD4M36M9EG Datasheet, PDF (4/7 Pages) Hanbit Electronics Co.,Ltd – 16Mbyte(4Mx36) 72-pin SIMM, EDO with Parity Mode, 2K/4K Ref. 5V
HANBit
HMD4M36M9EG, HMD4M36M9EA
ICC6 : /CAS-Before-/RAS Refresh Current * (/RAS and /CAS cycling @tRC=min )
IIL : Input Leakage Current (Any input 0V ≤ VIN ≤ 6.5V, all other pins not under test = 0V)
IOL : Output Leakage Current (Data out is disabled, 0V ≤ VOUT ≤ 5.5V
VOH : Output High Voltage Level (IOH= -5mA )
VOL : Output Low Voltage Level (IOL = 4.2mA )
* NOTE: ICC1, ICC3, ICC4 and ICC6 are dependent on output loading and cycle rates. Specified values are obtained with the
output open. ICC is specified as an average current. In ICC1 and ICC3, address cad be changed maximum once
while /RAS=VIL. In ICC4, address can be changed maximum once within one page mode cycle.
CAPACITANCE
o
( TA=25 C, Vcc = 5V, f = 1Mz )
DESCRIPTION
Input Capacitance (A0-A10)
Input Capacitance (/W)
Input Capacitance (/RAS0)
Input Capacitance (/CAS0-/CAS3)
Input/Output Capacitance (DQ0-31)
SYMBOL
CIN1
C IN2
CIN3
CIN4
CDQ1
MIN
-
-
-
-
-
MAX
65
80
50
40
20
UNITS
pF
pF
pF
pF
pF
AC CHARACTERISTICS
(
0
o
C
≤
TA
≤
70oC
,
Vcc
=
5V±10%,
See
notes
1,2.)
STANDARD OPERATION
Random read or write cycle time
Access time from RAS
Access time from CAS
Access time from column address
CAS to output in Low-Z
Output buffer turn-off delay
Transition time (rise and fall)
/RAS precharge time
/RAS pulse width
/RAS hold time
/CAS hold time
/CAS pulse width
/RAS to /CAS delay time
/RAS to column address delay time
/CAS to /RAS precharge time
Row address set-up time
Row address hold time
Column address set-up time
SYMBOL
tRC
tRAC
tCAC
tAA
tCLZ
tOFF
tT
tRP
tRAS
tRSH
tCSH
tCAS
tRCD
tRAD
tCRP
tASR
tRAH
tASC
-5
MIN
MAX
90
50
13
25
3
3
13
2
50
30
50
10K
13
38
8
10K
20
37
15
25
5
0
10
0
-6
MIN MAX
110
60
15
30
3
3
15
2
50
40
60
10K
15
45
10
10K
20
45
15
30
5
0
10
0
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
URL:www.hbe.co.kr
REV. 1.0. (August. 2002)
-4-
HANBit Electronics Co.,Ltd.