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HSD8M72D9A Datasheet, PDF (1/10 Pages) Hanbit Electronics Co.,Ltd – Synchronous DRAM Module 64Mbyte (8Mx72bit),DIMM with ECC based on 8Mx8, 4Banks, 4K Ref., 3.3V | |||
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HANBit
HSD8M72D9A
Synchronous DRAM Module 64Mbyte (8Mx72bit),DIMM with ECC
based on 8Mx8, 4Banks, 4K Ref., 3.3V
Part No. HSD8M72D9A
GENERAL DESCRIPTION
The HSD8M72D9A is a 8M x 72 bit Synchronous Dynamic RAM high density memory module. The module consists of
nine CMOS 2M x 8 bit with 4banks Synchronous DRAMs in TSOP-II 400mil packages on a 168-pin glass-epoxy
substrate. Two 0.33uF decoupling capacitors are mounted on the printed circuit board in parallel for each SDRAM. The
HSD8M72D9A is a DIMM(Dual in line Memory Module) and is intended for mounting into 168-pin edge connector sockets.
Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock
cycle. Range of operating frequencies, programmable latencies allows the same device to be useful for a variety of high
bandwidth, high performance memory system applications All module components may be powered from a single 3.3V DC
power supply and all inputs and outputs are LVTTL-compatible.
FEATURES
⢠Part Identification
HSD8M72D9A-F/10H : 100MHz (CL=2&3)
HSD8M72D9A-F/10L : 100MHz (CL=3)
HSD8M72D9A-F/10 : 100MHz (CL=2)
HSD8M72D9A-F/13 : 133MHz (CL=3)
HSD8M72D9A-F/13H : 133MHz (CL=2)
F means Auto & Self refresh with Low-Power (3.3V)
⢠Burst mode operation
⢠Auto & self refresh capability (4096 Cycles/64ms)
⢠LVTTL compatible inputs and outputs
⢠Single 3.3V ±0.3V power supply
⢠MRS cycle with address key programs
- Latency (Access from column address)
- Burst length (1, 2, 4, 8 & Full page)
- Data scramble (Sequential & Interleave)
⢠All inputs are sampled at the positive going edge of the system clock
⢠The used device is 2M x 8bit x 4Banks SDRAM
URL: www.hbe.co.kr
REV 1.0 (August.2002)
1
HANBit Electronics Co.,Ltd.
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