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HMS51232J4 Datasheet, PDF (1/6 Pages) Hanbit Electronics Co.,Ltd – SRAM MODULE 2Mbyte (512K x 32-Bit), 68-Pin JLCC Packaging
HANBit
HMS51232J4
SRAM MODULE 2Mbyte (512K x 32-Bit), 68-Pin JLCC Packaging
Part No. HMS51232J4
GENERAL DESCRIPTION
The HMS51232J4 is a static random access memory (SRAM) module containing 524,288 words organized in a x32-bit
configuration. The module consists of four 512K x 8 SRAMs mounted on a 68-pin, single-sided, FR4-printed circuit board.
Four chip enable inputs, (/CE1, /CE2, /CE3 and /CE4) are used to enable the module’s 4 bytes independently. Output
enable(/OE) and write enable(/WE) can set the memory input and output.
Data is written into the SRAM memory when write enable (/WE) and chip enable (/CE) inputs are both LOW. Reading is
accomplished when /WE remains HIGH and /CE and output enable (/OE) are LOW.
For reliability, this SRAM module is designed as multiple power and ground pin. All module components may be powered from
a single +5V DC power supply and all inputs and outputs are fully TTL-compatible.
FEATURES
w Access time : 10, 12 and 15ns
w High-density 2MByte design
w High-reliability, low-power design
w Single +5V ±0.5V power supply
w Three state output and TTL-compatible
w FR4-PCB design
w Low profile 68-Pin JLCC
OPTIONS
w Timing
10ns access
12ns access
15ns access
w Packages
68-pin JLCC
MARKING
-10
-12
-15
J
PIN ASSIGNMENT
DQ17
DQ18
DQ19
Vss
DQ20
DQ21
DQ22
DQ23
Vcc
DQ24
DQ25
DQ26
DQ27
Vss
DQ28
DQ29
DQ30
109 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 6610
11
59
12
58
13
57
14
56
15
55
16
54
17
53
18
52
19
51
20
50
21
49
22
48
23
47
24
46
25
45
68-Pin JLCC 26
44
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
TOP VIEW
DQ14
DQ13
DQ12
Vss
DQ11
DQ10
DQ9
DQ8
Vcc
DQ7
DQ6
DQ5
DQ4
Vss
DQ3
DQ2
DQ1
URL: www.hbe.co.kr
1
HANBit Electronics Co.,Ltd.
Rev. 1.0 (September / 2002)