S9226 Datasheet, PDF (3/4 Pages) Hamamatsu Corporation – CMOS linear image sensor Built-in timing generator and signal processing circuit; single 3.3 V supply operation

CMOS linear image sensor S9226
s Timing chart
T1
CLK
ST
thw (ST), INTEGRATION TIME
Video
Trig
EOS
tr (CLK)
tf (CLK)
CLK
tpw (CLK)
tr (ST)
tf (ST)
ST
tvd
Video
KMPDC0164EA
Parameter
Symbol
Min.
Typ.
Max.
Unit
Start pulse high time
thw (ST)
T1 × 4102
-
-
µs
Start pulse rise and fall time
tr (ST), tf (ST)
0
20
30
ns
Clock pulse width
tpw (CLK), T1
1.25
-
100
µs
Clock pulse rise and fall time
tr (CLK), tf (CLK)
0
20
30
ns
Video delay time
tvd
10
20
30
ns
Note: The CLK pulse should be set from high to low just once when the ST pulse is low. The internal shift register starts
operating at this timing.
The storage time is determined by the start pulse intervals. However, since the charge storage of each pixel is carried out
between the signal readout of that pixel and the next signal readout of the same pixel, the start time of charge storage
differs depending on each pixel. In addition, the next start pulse cannot be input until signal readout from all pixels is
completed.
s Block diagram
CLK
ST
Trig
GND
Vdd
EOS
Vg
2
4
3
1
8
7
5
TIMING GENERATOR
SHIFT REGISTER
ADDRESS SWITCH
12345
1023 1024
PHOTODIODE ARRAY
CHARGE CLAMP
AMP
CIRCUIT
6 Video
KMPDC0165EB
3