S10341_15 Datasheet, PDF (3/4 Pages) Hamamatsu Corporation – Low bias operation, for 800 nm band

Si APD
S10341 series
Terminal capacitance vs. reverse voltage
100
(Typ. Ta=25 °C, f=1 MHz)
10
S10341-05
Excess noise factor vs. gain
(Typ. Ta=25 °C, f=10 kHz, B=1 Hz)
10
M^0.5
λ=650 nm
M^0.3
1
S10341-02
0.1 ₀
50
100
150
11
Reverse voltage (V)
KAPDB0193EB
λ=800 nm
10
Gain
M^0.2
100
KAPDB0022EB
Recommended solder reflow condition
300
Peak temperature 235 °C max.
250
200
150
· After unpacking, store this device in an environment at a
temperature of 30 °C and a humidity below 60%, and perform
reflow soldering on this device within 24 hours.
· Thermal stress applied to the device during reflow soldering
differs depending on the PC boards and reflow oven being
used.
· When setting the reflow conditions, make sure that the reflow
soldering process does not degrade device reliability.
100
50
0
0
50
100
150
200 250
Time (s)
KAPDB0194EA
3