C7921CA-09 Datasheet, PDF (3/6 Pages) Hamamatsu Corporation – High resolution and high frame rate

Flat panel sensor C7921CA-09
s Timing chart
To acquire images through an image grabber board, write parameters in the software program or parameter file by referring to
the following timing chart and description.
1 FRAME
Vsync+ (GRABBER)
Hsync+ (GRABBER)
1st ROW
2nd ROW
He
LAST ROW
DUMMY LINES
1st ROW
2nd ROW
All pulses are counted in the
“High” period of Hsync+
ENLARGED VIEW
Vsync+ (GRABBER)
Hsync+ (GRABBER)
Phe
Pclk+ (GRABBER)
1st ROW
2nd ROW
Pg Phe Phd Phe Phd
All pulses are counted at the rising edge of Pclk+.
The effective video output is only included in the “Phe” period.
KACCC0362EA
Parameter
1×1
He
Effective line
Dummy line
1012
44
Phe
Effective pixel
Dummy pixel
1032
25
Phd
366
Pg
17
Note: “He” is the Hsync count. Phe, Phd and Pg are the Pclk count.
Pulse
2×2
506
22
516
13
894
17
4×4
253
11
258
7
1158
17
s External trigger mode
To acquire images in external trigger mode, input an external trigger pulse as shown below. When the time Tvd has passed after
the rising edge of the external trigger pulse, synchronous signals and video signals are output.
From Tmin to Tmax
RECOMMENDATION: 50 % OF FRAME TIME
ExtTrgLemo
ExtTrgGrb
(TTL)
Tvd
Vsync+
(RS-422)
Hsync+, Pclk+ and Data 1-12 are the same as internal trigger mode.
· Tmin is defined as 1/Sf (int).
· Tmax is defined as the reciprocal of the minimum value of Sf (ext).
· Tvd=450 µs
KACCC0363EA
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