S11059-02DT Datasheet, PDF (2/11 Pages) Hamamatsu Corporation – Digital color sensor

Digital color sensor
S11059-02DT/-03DS
Electrical and optical characteristics
Sensor section [Ta=25 °C, Vdd=Vbus=3.3 V, A light source, unless otherwise noted (initial setting: low gain, integration time: 546 ms/ch)]*³
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Blue
400 to 540
Spectral response range*⁴
Green
λ
Red
455 to 630
nm
575 to 660
Infrared, more than 700 nm
785 to 885
Blue
-
460
-
Peak sensitivity wavelength
λp
Green
Red
-
530
-
nm
-
615
-
Infrared, more than 700 nm
-
855
-
Current consumption ^{Operating mode Idd}
Standby mode Idds
E=0 lx (dark state),
excluding output current
30
75
150
μA
0.1
1.0
3.0
Dark count
Sd E=0 lx (dark state)
-
-
5
counts
Gain ratio
rg High gain/Low gain
-
10
-
-
Sbl Blue
2.4
4.4
6.4
Sgl Green
Initial setting
Srl Red
4.6
8.3
12.0
6.2
11.2
16.3
Photosensitivity Low gain
Sirl Infrared
Sbl Blue
-
3.0
-
3.3
4.4
5.5
counts/lx
Sgl
Green _{Initial setting*5}
Srl Red
6.2
8.3
10.4
8.4
11.2
14.0
Sirl Infrared
-
3.0
-
Red/Blue sensi. ratio
Red/Green sensi. ratio Low gain
Blue/Green sensi. ratio
Srl/Sbl
Srl/Sgl
Sbl/Sgl
Initial setting
Same chip
1.9
2.6
3.2
1.0
1.4
1.7
-
0.4
0.6
0.7
Sbh Blue
24.0
44.8
65.5
Sgh Green Integration time
Srh Red 546 ms/ch
46.5
64.0
85.0
117.0
123.5
170.0
Photosensitivity High gain
Sirh Infrared
Sbh Blue
-
33.5
30.0
45.0
-
56.5
counts/lx
Sgh Green Integration time
Srh Red 546 ms/ch*⁵
63.5
88.0
85.0
117.0
106.5
146.5
Sirh Infrared
-
30.0
-
Red/Blue sensi. ratio
Srh/Sbh
1.9
2.6
3.3
Red/Green sensi. ratio High gain
Srh/Sgh
Integration time 546 ms/ch
Same chip
1.0
1.4
1.8
-
Blue/Green sensi. ratio
Sbh/Sgh
0.4
0.6
0.7
*3: Provide light shielding so that no light enters from anywhere other than the top surface of the filter.
*4: Relative sensitivity=more than 10%
*5: Integration time is measured and corrected. See "Compensation method for sensitivity variation". Integration time measurement
accuracy is 0.36%.
I²C section (Ta=25 °C, Vdd=3.3 V, unless otherwise noted)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
I²C address
ADDR 7 bits
0x2A (0101010)
I²C clock frequency
fclk
1
-
400
kHz
SDA, SCL output
voltage
High level Voh Rp=2.2 kΩ
Low level Vol Rp=2.2 kΩ
0.7 Vbus
-
0
-
-
V
0.4
V
Input/output terminal capacitance Ci
-
-
SDA/SCL output fall time*⁶
tf Rp=2.2 kΩ, Cp=400 pF
-
-
*6: SCL/SDA output rise time is determined by a time constant of Cbus × Rp.
Note: The I²C interface (SDA, SCL) timings conform to the "I²C bus specification version 2.1".
20
pF
250
ns
2