S3921 Datasheet, PDF (1/6 Pages) Hamamatsu Corporation – NMOS linear image sensor Voltage output type with current-integration readout circuit and impedance conversion circuit

IMAGE SENSOR
NMOS linear image sensor
S3921/S3924 series
Voltage output type with current-integration readout circuit and impedance conversion circuit
NMOS linear image sensors are self-scanning photodiode arrays designed specifically as detectors for multichannel spectroscopy. The scanning
circuit is made up of N-channel MOS transistors, operates at low power consumption and is easy to handle. Each photodiode has a large active
area, high UV sensitivity yet very low noise, delivering a high S/N even at low light levels. NMOS linear image sensors also offer excellent output
linearity and wide dynamic range.
S3921/S3924 series have a current-integration readout circuit utilizing the video line and an impedance conversion circuit. The output is available
in boxcar waveform allowing signal readout with a simple external circuit.
The photodiodes of S3921 series have a height of 2.5 mm and are arrayed in a row at a spacing of 50 µm. The photodiodes of S3924 series also
have a height of 2.5 mm but are arrayed at a spacing of 25 µm. The photodiodes are available in 3 different pixel quantities for each series, 128
(S3921-128Q), 256 (S3921-256Q, S3924-256Q) and 512 (S3921-512Q, S3924-512Q) and 1024 (S3924-1024Q). Quartz glass is the standard
window material.
Features
Applications
l Built-in current-integration readout circuit utilizing
video line capacitance and impedance conversion
l Multichannel spectrophotometry
l Image readout system
circuit (boxcar waveform output)
l Wide active area
Pixel pitch: 50 µm (S3921 series)
25 µm (S3924 series)
Pixel height: 2.5 mm
l High UV sensitivity with good stability
l Low dark current and high saturation charge allow a long
integration time and a wide dynamic range at room temperature
l Excellent output linearity and sensitivity spatial uniformity
l Low voltage, single power supply operation
l Start pulse, clock pulse and video line reset pulse are
CMOS logic compatible
Figure 1 Equivalent circuit
Figure 2 Active area structure
START st
CLOCK 1
CLOCK 2
ADDRESS
SWITCH
ACTIVE
PHOTODIODE
SATURATION
CONTROL GATE
SATURATION
CONTROL DRAIN
ADDRESS
SWITCH
DUMMY DIODE
DIGITAL SHIFT REGISTER
(MOS SHIFT REGISTER)
END OF SCAN
SOURCE FOLLOWER CIRCUIT
Vdd
ACTIVE VIDEO
Vss
DUMMY VIDEO
RESET SWITCH
RESET
RESET V
b
a
OXIDATION SILICON
N TYPE SILICON
KMPDC0019EA
P TYPE SILICON
s Absolute maximum ratings
Parameter
Supply voltage
Input pulse (φ1, φ2, φst) voltage
Power consumption *¹
Operating temperature *²
Storage temperature
*1: Vdd=5 V, Vr=2.5 V
*2: No condensation
Symbol
Vdd
Vφ
P
Topr
Tstg
S3921 SERIES: a=50 µm, b=45 µm
S3924 SERIES: a=25 µm, b=20 µm
Value
15
15
10
-40 to +65
-40 to +85
KMPDA0067EA
Unit
V
V
mW
°C
°C