GS8673EQ18BGK-675I Datasheet, PDF (8/31 Pages) GSI Technology – On-Chip ECC with virtually zero SER

GS8673EQ18/36BK-675/625/550/500
Read Latency (RL)
Read Latency is the Read pipeline length, and directly impacts the maximum operating frequency of the device. It is user-
programmable through mode pins RLM [1:0].
GS8673EQ18/36BK-675 Read Latency
Read Latency (RL)
3.0 cycles
2.0 cycles
RLM1
1
0
RLM0
0
1
Frequency
167 MHz–675 MHz
167 MHz–450 MHz
GS8673EQ18/36BK-625 Read Latency
Read Latency (RL)
3.0 cycles
2.0 cycles
RLM1
1
0
RLM0
0
1
Frequency
167 MHz–625 MHz
167 MHz–400 MHz
GS8673EQ18/36BK-550 Read Latency
Read Latency (RL)
3.0 cycles
2.0 cycles
RLM1
1
0
RLM0
0
1
Frequency
167 MHz–550 MHz
167 MHz–375 MHz
GS8673EQ18/36BK-500 Read Latency
Read Latency (RL)
3.0 cycles
2.0 cycles
RLM1
1
0
RLM0
0
1
Frequency
167 MHz–500 MHz
167 MHz–333 MHz
Rev: 1.06 5/2012
8/31
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2011, GSI Technology