GS832018 Datasheet, PDF (6/25 Pages) GSI Technology – 2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs

A0–An
LBO
ADV
CK
ADSC
ADSP
GW
BW
BA
BB
BC
BD
Register
DQ
A0
A1
Preliminary
GS832018/32/36T-250/225/200/166/150/133
GS832018/32/36 Block Diagram
A0
D0
Q0 _A1
D1
Q1
Counter
Load
Register
DQ
Register
DQ
Register
DQ
Register
DQ
A
Memory
Array
Q
D
36
36
4
Register
DQ
E1
E2
E3
FT
G
Power Down
ZZ
Control
Note: Only x36 version shown for simplicity.
Register
DQ
Register
DQ
1
DQx1–DQx9
Rev: 1.02 10/2004
6/25
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology