GS8180QV36BD-200I Datasheet, PDF (4/28 Pages) GSI Technology – 18Mb Burst of 2 SigmaQuad SRAM

Pin Description Table
Symbol
Description
SA
Synchronous Address Inputs
NC
No Connect
R
Synchronous Read
W
Synchronous Write
BW0–BW1
Synchronous Byte Writes
BW2–BW3
Synchronous Byte Writes
K
Input Clock
K
Input Clock
C
Output Clock
C
Output Clock
TMS
Test Mode Select
TDI
Test Data Input
TCK
Test Clock Input
TDO
Test Data Output
V_REF
HSTL Input Reference Voltage
ZQ
Output Impedance Matching Input
MCL
Must Connect Low
D0–D17
Synchronous Data Inputs
D18–D35
Synchronous Data Inputs
Q0–Q17
Synchronous Data Outputs
Q18–Q35
Synchronous Data Outputs
V_DD
Power Supply
V_DDQ
Isolated Output Buffer Supply
V_SS
Power Supply: Ground
Notes:
1. NC = Not Connected to die or any other pin
2. C, C, K, or K cannot be set to V_REF voltage.
GS8180QV18/36BD-200/167
Type
Input
—
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Output
Input
Input
—
Input
Input
Output
Output
Supply
Supply
Supply
Comments
—
—
Active Low
Active Low
Active Low
Active Low (x36 only)
Active High
Active Low
Active High
Active Low
—
—
—
—
—
—
—
2.5 V Nominal
1.8 or 1.5 V Nominal
—
Rev: 1.02b 11/2011
4/28
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2007, GSI Technology